{"id":8364,"date":"2025-12-29T17:34:36","date_gmt":"2025-12-29T09:34:36","guid":{"rendered":"https:\/\/www.sic-wafers.com\/?p=8364"},"modified":"2025-12-29T17:43:20","modified_gmt":"2025-12-29T09:43:20","slug":"the-savior-of-ai-chip-thermal-management-why-nvidias-next-gen-gpus-are-switching-to-silicon-carbide-sic-interposers","status":"publish","type":"post","link":"https:\/\/www.sic-wafers.com\/vi\/the-savior-of-ai-chip-thermal-management-why-nvidias-next-gen-gpus-are-switching-to-silicon-carbide-sic-interposers\/","title":{"rendered":"\u201cC\u1ee9u tinh\u201d c\u1ee7a h\u1ec7 th\u1ed1ng qu\u1ea3n l\u00fd nhi\u1ec7t cho chip AI: T\u1ea1i sao c\u00e1c GPU th\u1ebf h\u1ec7 m\u1edbi c\u1ee7a NVIDIA l\u1ea1i chuy\u1ec3n sang s\u1eed d\u1ee5ng l\u1edbp \u0111\u1ec7m silicon carbide (SiC)"},"content":{"rendered":"<div style=\"margin-top: 0px; margin-bottom: 0px;\" class=\"sharethis-inline-share-buttons\" ><\/div>\n<p>Trong b\u1ed1i c\u1ea3nh \u0111i\u1ec7n to\u00e1n hi\u1ec7u su\u1ea5t cao (HPC) \u0111ang thay \u0111\u1ed5i nhanh ch\u00f3ng, ch\u00fang ta \u0111ang ch\u1ee9ng ki\u1ebfn s\u1ef1 chuy\u1ec3n \u0111\u1ed5i t\u1eeb k\u1ef7 nguy\u00ean \u201cSilicon cho m\u1ecdi th\u1ee9\u201d sang k\u1ef7 nguy\u00ean \u201cV\u1eadt li\u1ec7u chuy\u00ean d\u1ee5ng cho hi\u1ec7u su\u1ea5t\u201d. Trong khi NVIDIA chu\u1ea9n b\u1ecb ra m\u1eaft ki\u1ebfn tr\u00fac Rubin th\u1ebf h\u1ec7 ti\u1ebfp theo, m\u1ed9t s\u1ef1 thay \u0111\u1ed5i th\u1ea7m l\u1eb7ng nh\u01b0ng mang t\u00ednh c\u00e1ch m\u1ea1ng \u0111ang di\u1ec5n ra b\u00ean d\u01b0\u1edbi c\u00e1c chip silicon. \u0110\u1ec3 v\u01b0\u1ee3t qua nh\u1eefng gi\u1edbi h\u1ea1n v\u1eadt l\u00fd v\u1ec1 hi\u1ec7u n\u0103ng c\u1ee7a chip AI hi\u1ec7n t\u1ea1i, NVIDIA \u0111\u01b0\u1ee3c cho l\u00e0 \u0111ang l\u00ean k\u1ebf ho\u1ea1ch thay th\u1ebf c\u00e1c ch\u1ea5t n\u1ec1n trung gian silicon truy\u1ec1n th\u1ed1ng trong quy tr\u00ecnh \u0111\u00f3ng g\u00f3i ti\u00ean ti\u1ebfn CoWoS (Chip on Wafer on Substrate) b\u1eb1ng Silicon Carbide (SiC).<\/p>\n\n\n\n<figure class=\"wp-block-image aligncenter size-full\"><img data-dominant-color=\"c1c1bb\" data-has-transparency=\"false\" style=\"--dominant-color: #c1c1bb;\" fetchpriority=\"high\" decoding=\"async\" width=\"1000\" height=\"1000\" src=\"https:\/\/www.sic-wafers.com\/wp-content\/uploads\/2025\/12\/12-Inch-300mm-4H6H-SiC-Single-Crystal-Silicon-Carbide-Wafer-for-Power-LED-Devices1-1.webp\" alt=\"\" class=\"wp-image-8367 not-transparent\" srcset=\"https:\/\/www.sic-wafers.com\/wp-content\/uploads\/2025\/12\/12-Inch-300mm-4H6H-SiC-Single-Crystal-Silicon-Carbide-Wafer-for-Power-LED-Devices1-1.webp 1000w, https:\/\/www.sic-wafers.com\/wp-content\/uploads\/2025\/12\/12-Inch-300mm-4H6H-SiC-Single-Crystal-Silicon-Carbide-Wafer-for-Power-LED-Devices1-1-300x300.webp 300w, https:\/\/www.sic-wafers.com\/wp-content\/uploads\/2025\/12\/12-Inch-300mm-4H6H-SiC-Single-Crystal-Silicon-Carbide-Wafer-for-Power-LED-Devices1-1-150x150.webp 150w, https:\/\/www.sic-wafers.com\/wp-content\/uploads\/2025\/12\/12-Inch-300mm-4H6H-SiC-Single-Crystal-Silicon-Carbide-Wafer-for-Power-LED-Devices1-1-768x768.webp 768w, https:\/\/www.sic-wafers.com\/wp-content\/uploads\/2025\/12\/12-Inch-300mm-4H6H-SiC-Single-Crystal-Silicon-Carbide-Wafer-for-Power-LED-Devices1-1-600x600.webp 600w, https:\/\/www.sic-wafers.com\/wp-content\/uploads\/2025\/12\/12-Inch-300mm-4H6H-SiC-Single-Crystal-Silicon-Carbide-Wafer-for-Power-LED-Devices1-1-100x100.webp 100w\" sizes=\"(max-width: 1000px) 100vw, 1000px\" \/><\/figure>\n\n\n\n<p>\u0110\u1ed9ng th\u00e1i n\u00e0y \u0111\u00e1nh d\u1ea5u m\u1ed9t c\u1ed9t m\u1ed1c quan tr\u1ecdng \u0111\u1ed1i v\u1edbi ng\u00e0nh c\u00f4ng nghi\u1ec7p b\u00e1n d\u1eabn. Trong nhi\u1ec1u n\u0103m qua, SiC \u0111\u00e3 l\u00e0 \u201cc\u1ed7 m\u00e1y ch\u1ee7 l\u1ef1c\u201d c\u1ee7a l\u0129nh v\u1ef1c \u0111i\u1ec7n t\u1eed c\u00f4ng su\u1ea5t \u2014 cung c\u1ea5p n\u0103ng l\u01b0\u1ee3ng cho c\u00e1c b\u1ed9 bi\u1ebfn t\u1ea7n c\u1ee7a xe \u0111i\u1ec7n (EV) v\u00e0 c\u00e1c m\u1ea1ng l\u01b0\u1edbi n\u0103ng l\u01b0\u1ee3ng t\u00e1i t\u1ea1o. Gi\u1edd \u0111\u00e2y, n\u00f3 \u0111ang th\u00e2m nh\u1eadp v\u00e0o trung t\u00e2m c\u1ee7a c\u00e1c trung t\u00e2m d\u1eef li\u1ec7u \u0111\u1ec3 gi\u1ea3i quy\u1ebft th\u00e1ch th\u1ee9c c\u1ea5p b\u00e1ch nh\u1ea5t trong l\u0129nh v\u1ef1c tr\u00ed tu\u1ec7 nh\u00e2n t\u1ea1o (AI): \u201cB\u1ee9c t\u01b0\u1eddng nhi\u1ec7t\u201d.\u201d<\/p>\n\n\n\n<h2 class=\"wp-block-heading\">Cu\u1ed9c kh\u1ee7ng ho\u1ea3ng: T\u1ea1i sao c\u00e1c l\u1edbp \u0111\u1ec7m silicon l\u1ea1i g\u1eb7p ph\u1ea3i \u0111i\u1ec3m ngh\u1ebdn nhi\u1ec7t<\/h2>\n\n\n\n<p>S\u1ef1 theo \u0111u\u1ed5i kh\u00f4ng ng\u1eebng ngh\u1ec9 v\u1ec1 s\u1ee9c m\u1ea1nh t\u00ednh to\u00e1n c\u1ee7a AI \u0111\u00e3 \u0111\u1ea9y m\u1ee9c ti\u00eau th\u1ee5 \u0111i\u1ec7n n\u0103ng c\u1ee7a GPU l\u00ean m\u1ee9c k\u1ef7 l\u1ee5c. GPU H100 c\u1ee7a NVIDIA hi\u1ec7n \u0111\u00e3 ti\u00eau th\u1ee5 kho\u1ea3ng 1.470 W, v\u00e0 c\u00e1c b\u1ed9 x\u1eed l\u00fd Rubin s\u1eafp ra m\u1eaft d\u1ef1 ki\u1ebfn s\u1ebd v\u01b0\u1ee3t qua con s\u1ed1 \u0111\u00e1ng kinh ng\u1ea1c l\u00e0 1.100 W. \u1ede m\u1ee9c ti\u00eau th\u1ee5 n\u00e0y, b\u1ed9 chuy\u1ec3n m\u1ea1ch silicon truy\u1ec1n th\u1ed1ng\u2014c\u1ea7u n\u1ed1i gi\u1eefa logic GPU v\u00e0 b\u1ed9 nh\u1edb b\u0103ng th\u00f4ng cao (HBM)\u2014\u0111\u00e3 tr\u1edf th\u00e0nh m\u1ed9t g\u00e1nh n\u1eb7ng.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\">1. Nh\u1eefng h\u1ea1n ch\u1ebf v\u1ec1 \u0111\u1ed9 d\u1eabn nhi\u1ec7t<\/h3>\n\n\n\n<p>Silic c\u00f3 \u0111\u1ed9 d\u1eabn nhi\u1ec7t kho\u1ea3ng $150 \\text{ W\/mK}$. M\u1eb7c d\u00f9 con s\u1ed1 n\u00e0y l\u00e0 \u0111\u1ee7 \u0111\u1ed1i v\u1edbi c\u00e1c th\u1ebf h\u1ec7 tr\u01b0\u1edbc, nh\u01b0ng n\u00f3 kh\u00f4ng th\u1ec3 t\u1ea3n nhi\u1ec7t hi\u1ec7u qu\u1ea3 tr\u01b0\u1edbc d\u00f2ng nhi\u1ec7t m\u1ea1nh m\u1ebd do c\u00e1c chip AI c\u00f4ng su\u1ea5t h\u00e0ng ngh\u00ecn watt t\u1ea1o ra. Vi\u1ec7c t\u1ea3n nhi\u1ec7t kh\u00f4ng hi\u1ec7u qu\u1ea3 d\u1eabn \u0111\u1ebfn hi\u1ec7n t\u01b0\u1ee3ng \u201cgi\u1ea3m t\u1ed1c do nhi\u1ec7t\u201d, trong \u0111\u00f3 chip ph\u1ea3i gi\u1ea3m t\u1ed1c \u0111\u1ed9 xung nh\u1ecbp \u0111\u1ec3 tr\u00e1nh h\u01b0 h\u1ecfng v\u1eadt l\u00fd, t\u1eeb \u0111\u00f3 l\u00e0m m\u1ea5t \u0111i hi\u1ec7u su\u1ea5t \u0111\u1ea1t \u0111\u01b0\u1ee3c t\u1eeb c\u00e1c n\u00fat $3 \\text{ nm}$ ho\u1eb7c $2 \\text{ nm}$.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\">2. S\u1ef1 kh\u00f4ng ph\u00f9 h\u1ee3p v\u1ec1 h\u1ec7 s\u1ed1 gi\u00e3n n\u1edf nhi\u1ec7t (CTE)<\/h3>\n\n\n\n<p>\u0110\u1ed9 tin c\u1eady trong c\u00f4ng ngh\u1ec7 \u0111\u00f3ng g\u00f3i ti\u00ean ti\u1ebfn ph\u1ee5 thu\u1ed9c v\u00e0o c\u00e1ch c\u00e1c v\u1eadt li\u1ec7u gi\u00e3n n\u1edf v\u00e0 co l\u1ea1i. M\u1eb7c d\u00f9 c\u00e1c l\u1edbp \u0111\u1ec7m silicon c\u00f3 h\u1ec7 s\u1ed1 gi\u00e3n n\u1edf nhi\u1ec7t (CTE) l\u00e0 1,42 ppm\/\u00b0C, nh\u01b0ng c\u00e1c th\u00e0nh ph\u1ea7n xung quanh trong g\u00f3i s\u1ea3n ph\u1ea9m c\u00f9ng v\u1edbi c\u00e1c chu k\u1ef3 nhi\u1ec7t \u0111\u1ed9 c\u1ef1c \u0111oan do t\u1ea3i c\u00f4ng vi\u1ec7c AI g\u00e2y ra c\u00f3 th\u1ec3 t\u1ea1o ra \u1ee9ng su\u1ea5t c\u01a1 h\u1ecdc, d\u1eabn \u0111\u1ebfn hi\u1ec7n t\u01b0\u1ee3ng bong tr\u00f3c ho\u1eb7c xu\u1ea5t hi\u1ec7n c\u00e1c v\u1ebft n\u1ee9t vi m\u00f4 theo th\u1eddi gian.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\">Gi\u1ea3i ph\u00e1p SiC: Gi\u1ea3m 70% \u0111i\u1ec7n tr\u1edf nhi\u1ec7t<\/h2>\n\n\n\n<p>B\u1eb1ng c\u00e1ch chuy\u1ec3n sang s\u1eed d\u1ee5ng cacbua silic l\u00e0m v\u1eadt li\u1ec7u l\u1edbp \u0111\u1ec7m, NVIDIA v\u00e0 \u0111\u1ed1i t\u00e1c s\u1ea3n xu\u1ea5t TSMC \u0111ang t\u1eadn d\u1ee5ng m\u1ed9t lo\u1ea1i v\u1eadt li\u1ec7u c\u00f3 c\u00e1c \u0111\u1eb7c t\u00ednh ho\u00e0n to\u00e0n ph\u00f9 h\u1ee3p v\u1edbi c\u00e1c y\u00eau c\u1ea7u c\u1ee7a c\u00f4ng ngh\u1ec7 x\u1ebfp ch\u1ed3ng 2.5D v\u00e0 3D.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\">V\u1eadt l\u00fd c\u1ee7a hi\u1ec7u su\u1ea5t<\/h3>\n\n\n\n<p>Cacbua silic c\u00f3 \u0111\u1ed9 d\u1eabn nhi\u1ec7t kho\u1ea3ng $490 \\text{ W\/mK}$\u2014g\u1ea5p h\u01a1n ba l\u1ea7n so v\u1edbi silicon. Trong m\u00f4i tr\u01b0\u1eddng c\u00f3 m\u1eadt \u0111\u1ed9 d\u00f2ng nhi\u1ec7t cao, \u0111i\u1ec1u n\u00e0y c\u00f3 ngh\u0129a l\u00e0 nhi\u1ec7t \u0111\u01b0\u1ee3c t\u1ea3n ra kh\u1ecfi c\u00e1c chip logic l\u00f5i v\u1edbi hi\u1ec7u qu\u1ea3 ch\u01b0a t\u1eebng c\u00f3. C\u00e1c th\u1eed nghi\u1ec7m \u0111\u00e3 cho th\u1ea5y vi\u1ec7c thay th\u1ebf c\u00e1c l\u1edbp \u0111\u1ec7m silicon b\u1eb1ng SiC c\u00f3 th\u1ec3 gi\u1ea3m \u0111i\u1ec7n tr\u1edf nhi\u1ec7t g\u1ea7n 70%.<sup>2<\/sup><\/p>\n\n\n\n<p>\u0110\u1ed1i v\u1edbi m\u1ed9t nh\u00e0 \u0111i\u1ec1u h\u00e0nh trung t\u00e2m d\u1eef li\u1ec7u AI, \u0111i\u1ec1u n\u00e0y mang l\u1ea1i nh\u1eefng l\u1ee3i \u00edch thi\u1ebft th\u1ef1c:<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>Nhi\u1ec7t \u0111\u1ed9 t\u1ea1i \u0111i\u1ec3m n\u1ed1i th\u1ea5p h\u01a1n:<\/strong> C\u00e1c l\u1edbp \u0111\u1ec7m SiC c\u00f3 th\u1ec3 gi\u00fap gi\u1ea3m nhi\u1ec7t \u0111\u1ed9 ho\u1ea1t \u0111\u1ed9ng c\u1ee7a GPU cao c\u1ea5p t\u1eeb $95^\\circ\\text{C}$ xu\u1ed1ng c\u00f2n $75^\\circ\\text{C}$.<\/li>\n\n\n\n<li><strong>Tu\u1ed5i th\u1ecd t\u0103ng g\u1ea5p \u0111\u00f4i:<\/strong> B\u1eb1ng c\u00e1ch gi\u1ea3m \u00e1p l\u1ef1c nhi\u1ec7t v\u00e0 nhi\u1ec7t \u0111\u1ed9 ho\u1ea1t \u0111\u1ed9ng, tu\u1ed5i th\u1ecd v\u1eadt l\u00fd c\u1ee7a chip c\u00f3 th\u1ec3 \u0111\u01b0\u1ee3c k\u00e9o d\u00e0i l\u00ean \u0111\u1ebfn g\u1ea5p \u0111\u00f4i.<\/li>\n\n\n\n<li><strong>Gi\u1ea3m chi ph\u00ed l\u00e0m m\u00e1t:<\/strong> Vi\u1ec7c c\u1ea3i thi\u1ec7n kh\u1ea3 n\u0103ng t\u1ea3n nhi\u1ec7t th\u1ee5 \u0111\u1ed9ng b\u00ean trong v\u1ecf b\u1ecdc c\u00f3 th\u1ec3 gi\u00fap gi\u1ea3m kho\u1ea3ng 30% nhu c\u1ea7u n\u0103ng l\u01b0\u1ee3ng l\u00e0m m\u00e1t c\u1ee7a m\u1ed9t trung t\u00e2m d\u1eef li\u1ec7u.<\/li>\n<\/ul>\n\n\n\n<h2 class=\"wp-block-heading\">L\u1ed9 tr\u00ecnh tri\u1ec3n khai: T\u1eeb Blackwell \u0111\u1ebfn Rubin Ultra<\/h2>\n\n\n\n<p>Vi\u1ec7c NVIDIA chuy\u1ec3n sang s\u1eed d\u1ee5ng c\u00e1c l\u1edbp \u0111\u1ec7m SiC l\u00e0 m\u1ed9t b\u01b0\u1edbc \u0111i chi\u1ebfn l\u01b0\u1ee3c \u0111\u01b0\u1ee3c th\u1ef1c hi\u1ec7n theo t\u1eebng giai \u0111o\u1ea1n m\u1ed9t c\u00e1ch c\u1ea9n th\u1eadn. Theo l\u1ed9 tr\u00ecnh hi\u1ec7n t\u1ea1i, ch\u00fang ta s\u1ebd ch\u1ee9ng ki\u1ebfn qu\u00e1 tr\u00ecnh ph\u00e1t tri\u1ec3n nh\u01b0 sau:<\/p>\n\n\n\n<ol start=\"1\" class=\"wp-block-list\">\n<li><strong>2025\u20132026 (Blackwell v\u00e0 Rubin th\u1ebf h\u1ec7 \u0111\u1ea7u ti\u00ean):<\/strong> C\u00e1c chip AI cao c\u1ea5p s\u1ebd ti\u1ebfp t\u1ee5c s\u1eed d\u1ee5ng c\u00e1c b\u1ed9 \u0111\u1ec7m silicon (c\u1ee5 th\u1ec3 l\u00e0 bi\u1ebfn th\u1ec3 CoWoS-L) trong khi TSMC v\u00e0 c\u00e1c \u0111\u1ed1i t\u00e1c c\u1ee7a h\u1ecd ho\u00e0n thi\u1ec7n chu\u1ed7i cung \u1ee9ng s\u1ea3n xu\u1ea5t SiC.<sup>3<\/sup><\/li>\n\n\n\n<li><strong>N\u0103m 2027 (B\u01b0\u1edbc \u0111\u1ed9t ph\u00e1 v\u1ec1 SiC):<\/strong> \u0110\u00e2y l\u00e0 n\u0103m d\u1ef1 ki\u1ebfn s\u1ebd \u00e1p d\u1ee5ng r\u1ed9ng r\u00e3i c\u00e1c b\u1ed9 \u0111\u1ec7m SiC trong c\u00e1c b\u1ed9 x\u1eed l\u00fd cao c\u1ea5p c\u1ee7a NVIDIA.<sup>3<\/sup> \u0110i\u1ec1u n\u00e0y tr\u00f9ng h\u1ee3p v\u1edbi k\u1ebf ho\u1ea1ch ra m\u1eaft thi\u1ebft k\u1ebf CoWoS \u201c7x-mask\u201d c\u1ee7a TSMC, qua \u0111\u00f3 s\u1ebd m\u1edf r\u1ed9ng di\u1ec7n t\u00edch c\u1ee7a l\u1edbp \u0111\u1ec7m l\u00ean m\u1ee9c kh\u1ed5ng l\u1ed3 $14.400 mm\u00b2$.<\/li>\n<\/ol>\n\n\n\n<h2 class=\"wp-block-heading\">S\u1ef1 ph\u00e1t tri\u1ec3n c\u1ee7a th\u1ecb tr\u01b0\u1eddng t\u1ea5m wafer SiC 12 inch<\/h2>\n\n\n\n<p>M\u1ed9t trong nh\u1eefng h\u1ec7 qu\u1ea3 quan tr\u1ecdng nh\u1ea5t c\u1ee7a quy\u1ebft \u0111\u1ecbnh chuy\u1ec3n h\u01b0\u1edbng c\u1ee7a NVIDIA l\u00e0 s\u1ef1 b\u00f9ng n\u1ed5 trong <strong>Nhu c\u1ea7u v\u1ec1 ch\u1ea5t n\u1ec1n SiC<\/strong>.<sup>1<\/sup> Tr\u01b0\u1edbc \u0111\u00e2y, ng\u00e0nh c\u00f4ng nghi\u1ec7p SiC ch\u1ee7 y\u1ebfu t\u1eadp trung v\u00e0o c\u00e1c t\u1ea5m wafer 6 inch v\u00e0 8 inch d\u00e0nh cho l\u0129nh v\u1ef1c \u00f4 t\u00f4. Tuy nhi\u00ean, \u0111\u1ec3 \u0111\u00e1p \u1ee9ng c\u00e1c y\u00eau c\u1ea7u c\u1ee7a c\u00e1c b\u1ed9 \u0111\u1ec7m \u0111\u00f3ng g\u00f3i ti\u00ean ti\u1ebfn, ng\u00e0nh c\u00f4ng nghi\u1ec7p n\u00e0y \u0111ang chuy\u1ec3n h\u01b0\u1edbng sang c\u00e1c t\u1ea5m wafer SiC 12 inch (300 mm).<\/p>\n\n\n\n<h3 class=\"wp-block-heading\">T\u1ea1i sao l\u1ea1i l\u00e0 12 inch?<\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>M\u1eadt \u0111\u1ed9 t\u00edch h\u1ee3p:<\/strong> M\u1ed9t t\u1ea5m n\u1ec1n SiC k\u00edch th\u01b0\u1edbc 12 inch c\u00f3 di\u1ec7n t\u00edch b\u1ec1 m\u1eb7t l\u1edbn h\u01a1n 30% so v\u1edbi phi\u00ean b\u1ea3n 8 inch. \u0110i\u1ec1u n\u00e0y c\u00f3 \u00fd ngh\u0129a quan tr\u1ecdng \u0111\u1ed1i v\u1edbi chi\u1ebfn l\u01b0\u1ee3c \u201cScale-Up\u201d c\u1ee7a NVIDIA, trong \u0111\u00f3 m\u1ed9t t\u1ea5m \u0111\u1ec7m (interposer) duy nh\u1ea5t ph\u1ea3i ch\u1ee9a \u0111\u01b0\u1ee3c nhi\u1ec1u chiplet GPU v\u00e0 t\u1eeb 8 \u0111\u1ebfn 12 kh\u1ed1i b\u1ed9 nh\u1edb HBM4.<\/li>\n\n\n\n<li><strong>\u0110i\u1ec1u ch\u1ec9nh chi ph\u00ed:<\/strong> M\u1eb7c d\u00f9 c\u00e1c t\u1ea5m n\u1ec1n SiC k\u00edch th\u01b0\u1edbc 12 inch hi\u1ec7n nay c\u00f2n \u0111\u1eaft \u0111\u1ecf, nh\u01b0ng nhu c\u1ea7u l\u1edbn t\u1eeb ng\u00e0nh tr\u00ed tu\u1ec7 nh\u00e2n t\u1ea1o (AI) \u0111\u01b0\u1ee3c d\u1ef1 b\u00e1o s\u1ebd gi\u00fap gi\u00e1 gi\u1ea3m xu\u1ed1ng m\u1ee9c h\u1ee3p l\u00fd v\u00e0o n\u0103m 2027, t\u01b0\u01a1ng t\u1ef1 nh\u01b0 \u0111\u01b0\u1eddng cong gi\u00e1 l\u1ecbch s\u1eed c\u1ee7a c\u00e1c t\u1ea5m wafer silicon.<\/li>\n\n\n\n<li><strong>\u0110\u1ed9 nh\u1ea1y v\u1edbi l\u1ed7i gi\u1ea3m:<\/strong> Trong l\u0129nh v\u1ef1c \u0111i\u1ec7n t\u1eed c\u00f4ng su\u1ea5t, ch\u1ec9 c\u1ea7n m\u1ed9t \u1ed1ng vi m\u00f4 c\u0169ng c\u00f3 th\u1ec3 l\u00e0m h\u1ecfng m\u1ed9t MOSFET. Tuy nhi\u00ean, khi \u0111\u01b0\u1ee3c s\u1eed d\u1ee5ng l\u00e0m l\u1edbp \u0111\u1ec7m nhi\u1ec7t, c\u00e1c y\u00eau c\u1ea7u v\u1ec1 t\u00ednh to\u00e0n v\u1eb9n c\u1ee7a tinh th\u1ec3 l\u1ea1i c\u00f3 ch\u00fat kh\u00e1c bi\u1ec7t. Tr\u1ecdng t\u00e2m chuy\u1ec3n t\u1eeb \u0111\u1ed9 di \u0111\u1ed9ng c\u1ee7a c\u00e1c h\u1ea1t mang \u0111i\u1ec7n sang s\u1ef1 truy\u1ec1n d\u1eabn phonon (dao \u0111\u1ed9ng m\u1ea1ng tinh th\u1ec3 \u0111\u01b0\u1ee3c l\u01b0\u1ee3ng t\u1eed h\u00f3a c\u00f3 t\u00e1c d\u1ee5ng d\u1eabn nhi\u1ec7t). \u0110i\u1ec1u n\u00e0y gi\u00fap \u0111\u1ea9y nhanh ti\u1ebfn \u0111\u1ed9 s\u1ea3n xu\u1ea5t $12\\text{-inch}$ ngay c\u1ea3 khi ng\u00e0nh c\u00f4ng nghi\u1ec7p v\u1eabn \u0111ang ho\u00e0n thi\u1ec7n quy tr\u00ecnh nu\u00f4i c\u1ea5y tinh th\u1ec3.<\/li>\n<\/ul>\n\n\n\n<h2 class=\"wp-block-heading\">Nh\u1eefng th\u00e1ch th\u1ee9c trong s\u1ea3n xu\u1ea5t: \u0110\u1ed9 ch\u00ednh x\u00e1c \u1edf c\u1ea5p \u0111\u1ed9 kim c\u01b0\u01a1ng<\/h2>\n\n\n\n<p>Qu\u00e1 tr\u00ecnh chuy\u1ec3n \u0111\u1ed5i sang SiC kh\u00f4ng ph\u1ea3i l\u00e0 kh\u00f4ng g\u1eb7p tr\u1edf ng\u1ea1i. \u0110\u1ed9 c\u1ee9ng c\u1ee7a cacbua silic v\u00e0o kho\u1ea3ng 9,2 \u0111\u1ed9 Mohs \u2014 ch\u1ec9 \u0111\u1ee9ng sau kim c\u01b0\u01a1ng.<sup>3<\/sup> \u0110i\u1ec1u n\u00e0y khi\u1ebfn cho vi\u1ec7c c\u1eaft mi\u1ebfng v\u00e0 x\u1ebb l\u00e1t wafer theo ph\u01b0\u01a1ng ph\u00e1p truy\u1ec1n th\u1ed1ng tr\u1edf n\u00ean v\u00f4 c\u00f9ng kh\u00f3 kh\u0103n.<\/p>\n\n\n\n<p>N\u1ebfu c\u00f4ng ngh\u1ec7 c\u1eaft kh\u00f4ng \u0111\u1ee7 ti\u00eau chu\u1ea9n, b\u1ec1 m\u1eb7t SiC c\u00f3 th\u1ec3 xu\u1ea5t hi\u1ec7n c\u00e1c khuy\u1ebft t\u1eadt d\u1ea1ng \u201cs\u00f3ng\u201d, khi\u1ebfn n\u00f3 kh\u00f4ng th\u1ec3 s\u1eed d\u1ee5ng \u0111\u01b0\u1ee3c cho qu\u00e1 tr\u00ecnh h\u00e0n ch\u00ednh x\u00e1c cao c\u1ea7n thi\u1ebft trong \u0111\u00f3ng g\u00f3i CoWoS. \u0110\u1ec3 gi\u1ea3i quy\u1ebft v\u1ea5n \u0111\u1ec1 n\u00e0y, c\u00e1c doanh nghi\u1ec7p h\u00e0ng \u0111\u1ea7u trong ng\u00e0nh \u0111ang chuy\u1ec3n sang s\u1eed d\u1ee5ng c\u00f4ng ngh\u1ec7 c\u1eaft b\u1eb1ng laser ti\u00ean ti\u1ebfn v\u00e0 c\u00e1c m\u00e1y c\u01b0a \u0111a d\u00e2y chuy\u00ean d\u1ee5ng \u0111\u1ec3 \u0111\u1ea1t \u0111\u01b0\u1ee3c \u0111\u1ed9 ch\u00ednh x\u00e1c \u00b10,01 mm.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\">\u0110\u1ecbnh v\u1ecb chi\u1ebfn l\u01b0\u1ee3c: C\u00e1ch ZMSH h\u1ed7 tr\u1ee3 h\u1ea1 t\u1ea7ng tr\u00ed tu\u1ec7 nh\u00e2n t\u1ea1o<\/h2>\n\n\n\n<p>V\u1edbi t\u01b0 c\u00e1ch l\u00e0 nh\u00e0 cung c\u1ea5p h\u00e0ng \u0111\u1ea7u v\u1ec1 v\u1eadt li\u1ec7u b\u00e1n d\u1eabn ti\u00ean ti\u1ebfn, <strong>ZMSH (C\u00f4ng ty TNHH Th\u01b0\u01a1ng m\u1ea1i N\u1ed5i ti\u1ebfng Th\u01b0\u1ee3ng H\u1ea3i)<\/strong> \u0111ang \u0111i \u0111\u1ea7u trong cu\u1ed9c c\u00e1ch m\u1ea1ng v\u1eadt li\u1ec7u n\u00e0y. Ch\u00fang t\u00f4i hi\u1ec3u r\u1eb1ng t\u01b0\u01a1ng lai c\u1ee7a tr\u00ed tu\u1ec7 nh\u00e2n t\u1ea1o ph\u1ee5 thu\u1ed9c v\u00e0o \u0111\u1ed9 \u1ed5n \u0111\u1ecbnh v\u00e0 hi\u1ec7u su\u1ea5t nhi\u1ec7t c\u1ee7a ch\u1ea5t n\u1ec1n.<\/p>\n\n\n\n<p>Ch\u00fang t\u00f4i chuy\u00ean v\u1ec1 vi\u1ec7c thi\u1ebft k\u1ebf theo y\u00eau c\u1ea7u v\u00e0 cung c\u1ea5p <strong>C\u00e1c t\u1ea5m n\u1ec1n cacbua silic (SiC) d\u1eabn \u0111i\u1ec7n v\u00e0 b\u00e1n c\u00e1ch \u0111i\u1ec7n c\u00f3 k\u00edch th\u01b0\u1edbc t\u1eeb 2 \u0111\u1ebfn 12 inch<\/strong>, \u0111\u01b0\u1ee3c thi\u1ebft k\u1ebf ri\u00eang cho c\u00e1c \u1ee9ng d\u1ee5ng \u0111\u00f2i h\u1ecfi kh\u1eaft khe nh\u1ea5t trong l\u0129nh v\u1ef1c \u0111i\u1ec7n t\u1eed c\u00f4ng su\u1ea5t v\u00e0 \u0111\u00f3ng g\u00f3i chip AI. .<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>T\u00f9y ch\u1ec9nh to\u00e0n di\u1ec7n:<\/strong> Ch\u00fang t\u00f4i cung c\u1ea5p c\u00e1c gi\u1ea3i ph\u00e1p t\u00f9y ch\u1ec9nh cho \u0111\u1ecbnh h\u01b0\u1edbng tinh th\u1ec3 ($$\/$$), c\u00e1c m\u1ee9c \u0111i\u1ec7n tr\u1edf kh\u00e1c nhau (t\u1eeb $10^{-3}$ \u0111\u1ebfn $10^{10} \\Omega\\cdot\\text{cm}$), c\u00f9ng \u0111\u1ed9 d\u00e0y dao \u0111\u1ed9ng t\u1eeb $350$ \u0111\u1ebfn $2000 \\mu\\text{m}$.<\/li>\n\n\n\n<li><strong>Gia c\u00f4ng ch\u00ednh x\u00e1c:<\/strong> V\u1edbi x\u01b0\u1edfng gia c\u00f4ng c\u01a1 kh\u00ed hi\u1ec7n \u0111\u1ea1i, ch\u00fang t\u00f4i cung c\u1ea5p d\u1ecbch v\u1ee5 h\u1ee3p t\u00e1c k\u1ef9 thu\u1eadt tr\u1ecdn g\u00f3i, bao g\u1ed3m c\u1eaft l\u00e1t wafer v\u00e0 x\u1eed l\u00fd b\u1ec1 m\u1eb7t, nh\u1eb1m \u0111\u1ea3m b\u1ea3o \u0111\u00e1p \u1ee9ng c\u00e1c y\u00eau c\u1ea7u v\u1ec1 h\u00e0n nhi\u1ec7t \u0111\u1ed9 cao c\u1ee7a th\u1ebf h\u1ec7 ti\u1ebfp theo.<sup>3<\/sup><\/li>\n\n\n\n<li><strong>Ngu\u1ed3n cung \u1ee9ng to\u00e0n c\u1ea7u \u0111\u00e1ng tin c\u1eady:<\/strong> V\u1edbi m\u1ea1ng l\u01b0\u1edbi b\u00e1n h\u00e0ng to\u00e0n c\u1ea7u v\u00e0 h\u1ec7 th\u1ed1ng ki\u1ec3m so\u00e1t ch\u1ea5t l\u01b0\u1ee3ng nghi\u00eam ng\u1eb7t (\u0111\u01b0\u1ee3c ch\u1ee9ng nh\u1eadn theo ti\u00eau chu\u1ea9n RoHS v\u00e0 \u0110\u00e1nh gi\u00e1 N\u0103ng l\u1ef1c Nh\u00e0 cung c\u1ea5p), ch\u00fang t\u00f4i cung c\u1ea5p n\u1ec1n t\u1ea3ng v\u1eefng ch\u1eafc v\u00e0 \u0111\u00e1ng tin c\u1eady c\u1ea7n thi\u1ebft cho chu\u1ed7i cung \u1ee9ng AI. .<\/li>\n<\/ul>\n\n\n\n<h2 class=\"wp-block-heading\">K\u1ebft lu\u1eadn: SiC \u2013 n\u1ec1n t\u1ea3ng c\u1ee7a c\u00f4ng ngh\u1ec7 m\u00e1y t\u00ednh th\u1ebf h\u1ec7 m\u1edbi<\/h2>\n\n\n\n<p>Th\u00f4ng tin cho r\u1eb1ng c\u00e1c b\u1ed9 x\u1eed l\u00fd c\u1ee7a NVIDIA \u0111ang chuy\u1ec3n sang s\u1eed d\u1ee5ng l\u1edbp \u0111\u1ec7m nhi\u1ec7t b\u1eb1ng cacbua silic (SiC) kh\u00f4ng ch\u1ec9 l\u00e0 m\u1ed9t chi ti\u1ebft k\u1ef9 thu\u1eadt nh\u1ecf; \u0111\u00f3 l\u00e0 m\u1ed9t tuy\u00ean b\u1ed1 r\u1eb1ng k\u1ef7 nguy\u00ean tr\u00ed tu\u1ec7 nh\u00e2n t\u1ea1o (AI) \u0111\u00f2i h\u1ecfi m\u1ed9t n\u1ec1n t\u1ea3ng v\u1eadt li\u1ec7u m\u1edbi. B\u1eb1ng c\u00e1ch kh\u1eafc ph\u1ee5c \u0111i\u1ec3m ngh\u1ebdn v\u1ec1 nhi\u1ec7t, SiC t\u1ea1o \u0111i\u1ec1u ki\u1ec7n cho vi\u1ec7c \u201cm\u1edf r\u1ed9ng quy m\u00f4 c\u1ef1c \u0111\u1ea1i\u201d c\u1ea7n thi\u1ebft cho th\u1ebf h\u1ec7 ti\u1ebfp theo c\u1ee7a c\u00e1c m\u00f4 h\u00ecnh AI suy lu\u1eadn v\u00e0 c\u00e1c n\u1ec1n t\u1ea3ng \u201cAI \u0111\u1ea1i l\u00fd\u201d.<\/p>\n\n\n\n<p>Khi ch\u00fang ta ti\u1ebfn t\u1edbi n\u0103m 2027, s\u1ef1 k\u1ebft h\u1ee3p gi\u1eefa nhu c\u1ea7u \u0111\u01b0\u1ee3c th\u00fac \u0111\u1ea9y b\u1edfi tr\u00ed tu\u1ec7 nh\u00e2n t\u1ea1o (AI) v\u00e0 s\u1ef1 \u0111\u1ed5i m\u1edbi v\u1ec1 v\u1eadt li\u1ec7u s\u1ebd gi\u00fap cacbua silic tr\u1edf th\u00e0nh n\u1ec1n t\u1ea3ng c\u1ee7a c\u01a1 s\u1edf h\u1ea1 t\u1ea7ng b\u00e1n d\u1eabn. \u0110\u1ed1i v\u1edbi c\u00e1c k\u1ef9 s\u01b0 v\u00e0 chuy\u00ean gia mua s\u1eafm mong mu\u1ed1n th\u00edch \u1ee9ng v\u1edbi s\u1ef1 chuy\u1ec3n \u0111\u1ed5i n\u00e0y, vi\u1ec7c h\u1ee3p t\u00e1c v\u1edbi m\u1ed9t nh\u00e0 cung c\u1ea5p s\u1edf h\u1eefu c\u1ea3 chuy\u00ean m\u00f4n v\u1ec1 v\u1eadt li\u1ec7u l\u1eabn n\u0103ng l\u1ef1c s\u1ea3n xu\u1ea5t ch\u00ednh x\u00e1c l\u00e0 \u0111i\u1ec1u v\u00f4 c\u00f9ng quan tr\u1ecdng.<\/p>\n\n\n\n<p><strong>H\u00e3y li\u00ean h\u1ec7 v\u1edbi XINKEHUI ngay h\u00f4m nay \u0111\u1ec3 t\u00ecm hi\u1ec3u c\u00e1ch th\u1ee9c <a href=\"https:\/\/www.sic-wafers.com\/vi\/product\/12-inch-300mm-4h-6h-sic-single-crystal-silicon-carbide-wafer-for-power-electronics-led-applications\/\">T\u1ea5m n\u1ec1n SiC 12 inch <\/a>C\u00e1c kh\u1ea3 n\u0103ng n\u00e0y c\u00f3 th\u1ec3 h\u1ed7 tr\u1ee3 c\u00e1c d\u1ef1 \u00e1n t\u00ednh to\u00e1n hi\u1ec7u su\u1ea5t cao th\u1ebf h\u1ec7 m\u1edbi c\u1ee7a b\u1ea1n.<\/strong><\/p>","protected":false},"excerpt":{"rendered":"<p>In the rapidly evolving landscape of high-performance computing (HPC), we are witnessing a transition from the era of &#8220;Silicon for everything&#8221; to an era of &#8220;Specialized Materials for Performance.&#8221; As NVIDIA prepares to unleash its next-generation Rubin architecture, a quiet but seismic shift is happening beneath the silicon dies. To overcome the physical limits of [&hellip;]<\/p>\n","protected":false},"author":2,"featured_media":8367,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"_uag_custom_page_level_css":"","footnotes":""},"categories":[27],"tags":[1414,1613,1615,1168,1612,1546,1614],"class_list":["post-8364","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-companynews","tag-advanced-packaging","tag-cowos","tag-nvidia-rubin-gpu","tag-sic-substrate","tag-silicon-carbide-interposer","tag-thermal-management","tag-tsmc"],"acf":[],"uagb_featured_image_src":{"full":["https:\/\/www.sic-wafers.com\/wp-content\/uploads\/2025\/12\/12-Inch-300mm-4H6H-SiC-Single-Crystal-Silicon-Carbide-Wafer-for-Power-LED-Devices1-1.webp",1000,1000,false],"thumbnail":["https:\/\/www.sic-wafers.com\/wp-content\/uploads\/2025\/12\/12-Inch-300mm-4H6H-SiC-Single-Crystal-Silicon-Carbide-Wafer-for-Power-LED-Devices1-1-150x150.webp",150,150,true],"medium":["https:\/\/www.sic-wafers.com\/wp-content\/uploads\/2025\/12\/12-Inch-300mm-4H6H-SiC-Single-Crystal-Silicon-Carbide-Wafer-for-Power-LED-Devices1-1-300x300.webp",300,300,true],"medium_large":["https:\/\/www.sic-wafers.com\/wp-content\/uploads\/2025\/12\/12-Inch-300mm-4H6H-SiC-Single-Crystal-Silicon-Carbide-Wafer-for-Power-LED-Devices1-1-768x768.webp",768,768,true],"large":["https:\/\/www.sic-wafers.com\/wp-content\/uploads\/2025\/12\/12-Inch-300mm-4H6H-SiC-Single-Crystal-Silicon-Carbide-Wafer-for-Power-LED-Devices1-1.webp",800,800,false],"1536x1536":["https:\/\/www.sic-wafers.com\/wp-content\/uploads\/2025\/12\/12-Inch-300mm-4H6H-SiC-Single-Crystal-Silicon-Carbide-Wafer-for-Power-LED-Devices1-1.webp",1000,1000,false],"2048x2048":["https:\/\/www.sic-wafers.com\/wp-content\/uploads\/2025\/12\/12-Inch-300mm-4H6H-SiC-Single-Crystal-Silicon-Carbide-Wafer-for-Power-LED-Devices1-1.webp",1000,1000,false],"trp-custom-language-flag":["https:\/\/www.sic-wafers.com\/wp-content\/uploads\/2025\/12\/12-Inch-300mm-4H6H-SiC-Single-Crystal-Silicon-Carbide-Wafer-for-Power-LED-Devices1-1.webp",12,12,false],"woocommerce_thumbnail":["https:\/\/www.sic-wafers.com\/wp-content\/uploads\/2025\/12\/12-Inch-300mm-4H6H-SiC-Single-Crystal-Silicon-Carbide-Wafer-for-Power-LED-Devices1-1-300x300.webp",300,300,true],"woocommerce_single":["https:\/\/www.sic-wafers.com\/wp-content\/uploads\/2025\/12\/12-Inch-300mm-4H6H-SiC-Single-Crystal-Silicon-Carbide-Wafer-for-Power-LED-Devices1-1-600x600.webp",600,600,true],"woocommerce_gallery_thumbnail":["https:\/\/www.sic-wafers.com\/wp-content\/uploads\/2025\/12\/12-Inch-300mm-4H6H-SiC-Single-Crystal-Silicon-Carbide-Wafer-for-Power-LED-Devices1-1-100x100.webp",100,100,true]},"uagb_author_info":{"display_name":"lydia","author_link":"https:\/\/www.sic-wafers.com\/vi\/author\/lydia\/"},"uagb_comment_info":0,"uagb_excerpt":"In the rapidly evolving landscape of high-performance computing (HPC), we are witnessing a transition from the era of &#8220;Silicon for everything&#8221; to an era of &#8220;Specialized Materials for Performance.&#8221; As NVIDIA prepares to unleash its next-generation Rubin architecture, a quiet but seismic shift is happening beneath the silicon dies. To overcome the physical limits of&hellip;","_links":{"self":[{"href":"https:\/\/www.sic-wafers.com\/vi\/wp-json\/wp\/v2\/posts\/8364","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.sic-wafers.com\/vi\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.sic-wafers.com\/vi\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.sic-wafers.com\/vi\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/www.sic-wafers.com\/vi\/wp-json\/wp\/v2\/comments?post=8364"}],"version-history":[{"count":2,"href":"https:\/\/www.sic-wafers.com\/vi\/wp-json\/wp\/v2\/posts\/8364\/revisions"}],"predecessor-version":[{"id":8369,"href":"https:\/\/www.sic-wafers.com\/vi\/wp-json\/wp\/v2\/posts\/8364\/revisions\/8369"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.sic-wafers.com\/vi\/wp-json\/wp\/v2\/media\/8367"}],"wp:attachment":[{"href":"https:\/\/www.sic-wafers.com\/vi\/wp-json\/wp\/v2\/media?parent=8364"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.sic-wafers.com\/vi\/wp-json\/wp\/v2\/categories?post=8364"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.sic-wafers.com\/vi\/wp-json\/wp\/v2\/tags?post=8364"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}